Design Methodology for Inductively Degenerated CMOS Low Noise Amplifier for 2.47 GHz Frequency at 0.18μm Technology for T-Matching

The objective is to develop an amplifier with desired specifications. In this paper we have tried to explain how we designed an amplifier at 2.47 GHz for W-LAN application and had two options. They were whether to design a power amplifier (PA) or to design a low noise amplifier (LNA). The possibility of PA was eliminated by the fact that we were going to use it as the first block in receiver side. Hence it had to be a LNA. We are using 0.18μm technology for designing purpose. So our length is fixed to 0.18μm and to obtain the desired value of current, width is to be varied. Value of current, in IC designing, depends on the ratio of width (W) and length (L). We used “ADVANCED DESIGN SYSTEM” for simulation purpose. It is user friendly tool and easy to understand. ADS is the “Hi-Frequency & Hi-Speed” platform for IC, Package and Board CoDesign.